The manufacture of integrated circuits in a semiconductor device involves the sequential deposition of layers in which patterns are formed. Normally, a photoresist is exposed to form a pattern which is then etch transferred into an underlying layer. In back end of line (BEOL) processing, patterns consisting of trenches and via holes are filled with a conductive material to form interconnects comprised of horizontal connections within a layer and vertical connections between two layers. Conductive materials used in the interconnects are separated by insulating or dielectric materials to prevent crosstalk between the metal wiring. A popular method of manufacturing metal interconnects is a dual damascene structure in which vias and trenches are filled simultaneously with metal in an efficient, high yield process.
There is a constant focus on reducing the size of metal interconnects in order to provide devices with higher performance. Recent achievements have focused on lowering the resistivity of the conductive metal by switching from aluminum to copper, decreasing the size of the vias and trenches with improved lithographic materials and processes, and reducing the dielectric constant of insulating materials to avoid capacitive coupling between conductive lines.
The lithography method used to define a pattern in a dual damascene structure has unique challenges, especially when forming a trench in a via first process. For example, when forming a trench in a dual damascene structure, the photoresist process must contend with considerable topography since an opening on a level surface is produced at the same time as removing exposed photoresist inside a hole below the trench level.
The lithographic process is further complicated by an ever present demand for smaller trench widths which in turn require a more precise alignment over the via holes. From a photoresist standpoint, a smaller critical dimension (CD) in a feature such as a trench is more easily printed when the film thickness is reduced or the exposure wavelength is decreased according to the equation R=kλ/NA. R is the minimum CD that can be resolved while k is a process constant, λ is the exposure wavelength, and NA is the numerical aperture of the exposure tool. Thinner films help to lower k but when forming a trench over a via hole in a dual damascene process, a thin photoresist film is not effective because it is difficult to dean out the via hole while controlling the width of the trench above the via.
One concept that has been introduced in an attempt to overcome the topography issue is to partially fill the via hole with a photoresist plug. A prior art method including a photoresist plug is illustrated in FIGS. 1a-1d which are cross-sectional views of a dual damascene structure during its fabrication. A substrate 10 is provided in which a conductive layer 11 has been formed. A barrier layer 12 such as silicon nitride, a dielectric layer 13 comprised of a material like SiO2, and an etch stop layer 14 consisting of a carbide, oxide, or nitride are sequentially deposited on substrate 10. Then a second dielectric layer 15 and a second etch stop layer 16 are formed above first etch stop 14. A photoresist layer (not shown) is coated and patterned on etch stop layer 16 and then a plasma etch step is used to form via hole 17 in FIG. 1a. After the initial photoresist layer is removed, a second photoresist 18 is spin coated on etch stop 16 and then etched back until the level of photoresist 18 is below the top of via hole 17 and thereby forms a plug as shown in FIG. 1b. 
Next photoresist 19 is coated on etch stop 16 and is patterned to form a trench opening 20 that is above via 17 as depicted in FIG. 1c. The trench opening 20 is etch transferred through exposed etch stop 16 and through dielectric layer 15. The top portion of photoresist plug 18 is also etched away. The final steps of photoresist removal, deposition of metal 21, and a chemical mechanical polish (CMP) step are used to complete the dual damascene structure shown in FIG. 1d. One concern with this approach is that photoresist residue or scum may result when plug 18 is not inert and interacts with photoresist 19. The scum typically occurs at the interface of photoresist 19 and plug 18 and must be removed since it will interfere with a subsequent etch step. Usually, an expensive rework process in which the entire photoresist layer 19 is stripped, recoated, and patterned again to form trench 20 is necessary.
Another dual damascene method involving formation of a trench above two via holes that is shown in FIGS. 2a-2c also has problems associated with a photoresist plug. A substrate 30 is provided in which conductive lines 31 have been formed. A barrier layer 32, dielectric layer 33 such as SiO2, and etch stop layer 34 such as a nitride, oxide or carbide are deposited on substrate 30. Via holes 36 are formed according to a conventional method and are then filled with a photoresist 38 that is etched back to a level below the top of via holes 36. A second photoresist 40 is then coated and patterned on etch stop layer 34.
In some cases as shown in FIG. 5, an interaction between photoresist 40 and photoresist plug 38 causes a bridge 40a to be formed. Photoresist 40 consists of a positive tone composition in which the exposed regions are washed away in an aqueous base developer or a negative tone composition where unexposed regions are removed with aqueous base developer. In either case, a bridge 40a forms because a reaction occurs in which some of the material in photoresist 40 remains insoluble in developer. Then a subsequent etch process cannot complete the opening of the trench 48a shown in FIG. 2b. An expensive rework process is necessary to recycle the substrate and repeat the photoresist patterning step such that a successful etch transfer step can be accomplished.
Once trench 48a is formed, photoresist plug 38 and photoresist layer 40 are removed. Metal deposition of layer 50 and planarization completes the dual damascene structure shown in FIG. 2c. Although the photoresist plug 38 can be treated with high temperature to render it inactive, this step causes problems later when an etch step to remove the plug results in an ash that remains on the via bottom and induces a metal open issue in the resulting device.
Another problem associated with the dual damascene approach shown in FIGS. 2a-2c is a tendency for a void 42 to form in via hole 36a as depicted in FIG. 3. A void can form when the photoresist plug 38 is not completely inert and further reacts during the trench patterning step. The photoresist plug 38 may react to expel a gas which leaves a void or some of the aqueous base developer may remove a portion of plug 38 if the developer can penetrate the surface of the layer. The presence of a void 42 in plug 38 can affect the trench etch process such that there is an insufficient thickness of plug 38 to protect the bottom of via 36. For example, the etch transfer of trench 48 in photoresist 40 into dielectric layer 33 to form trench 48a may also penetrate through a void 42 in plug 38 to reach the bottom of via 36a and cause damage to barrier layer 32 and underlying metal layer 31.
Still another difficulty with the damascene patterning method shown in FIGS. 2a-2c is a tendency for the photoresist plug 38 to be completely removed during the trench patterning process as shown in FIG. 4. With no plug 38 in place to protect the bottom of via 36c during etch transfer of trench 48 into dielectric layer 33 to produce trench 48a, the barrier layer 32 and underlying conductive layer 31 can be damaged and a loss in device performance will result.
U.S. Pat. No. 6,211,068 describes an alternate method for applying a photoresist plug in a making a trench in a dual damascene structure. This approach is claimed to solve an interaction between the photoresist plug and surrounding dielectric layer that leads to incomplete removal of dielectric layer during the etch transfer step. The suggested solution is to etch back the level of the plug so that it is below the level of the intended trench in the dielectric layer. An interaction between the photoresist plug and dielectric material is thereby avoided during the etch transfer. However, the photoresist layer that becomes a plug is also used to form the trench opening above the damascene stack. It is difficult to control the exposure of photoresist within the via hole and simultaneously control trench formation within a tight space width specification. As a result, the process window is usually small and photoresist residue is likely to form within the via hole.
An improved method of photoresist patterning is mentioned in U.S. Pat. No. 6,156,640 in which an anti-reflective layer comprised of an oxynitride is formed as the top layer in a damascene stack and enables a larger process window when forming a trench opening in the photoresist layer. The method is a trench first process and forming the via hole second is more challenging since the hole must be printed in a thicker resist layer than a via first technique.
A dual damascene structure is described in U.S. Pat. No. 5,933,761 in which ion implant steps are employed to form etch stop layers within a dielectric layer. Implanting nitrogen or nitrogen ions to a controlled depth becomes especially challenging as the width of trenches and via holes approaches 100 nm to 130 nm sizes needed for the most recent technology generations. The method also requires photoresist patterning over considerable topography which can reduce the lithographic process window.
Another fabrication method for a dual damascene structure is described in U.S. Pat. No. 6,319,820 where electron beam (e-beam) curing is conducted on a hydrogenated silsesquioxane (HSQ) dielectric layer in order to impart a higher etch selectivity. Because the uncured HSQ regions undergo a faster etch than cured regions, a wet etch process can be applied to form a trench and via hole. Here it is understood that the electrons in the curing step transform the HSQ into a denser and more rigid structure. However, the process involves a dose of 1000 to 10000 microCoulombs/cm2 and a substrate temperature in the range of 3000° C. to 500° C. which is not compatible with some dielectric materials.
Therefore, an improved patterning method for forming trenches in via first dual damascene processes is desirable. A photoresist plug has an advantage in enabling a larger process window when patterning an overlying photoresist to form a trench pattern. However, the plug must be rendered inactive so that it does not interact with the overlying photoresist to cause void or bridging defects. In addition the plug should not interact with an adjacent dielectric material to cause fences during the trench etch transfer. The procedure that makes the plug inactive toward adjacent layers must not interfere with plug removal at a later stage since ash residue in the via hole can result in metal opens which are incomplete connections in the final device.